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80387DX
Math Coprocessor
80387
Memory
Logic Diagram
FEATURES:
* 80-Bit numeric processor * RAD-PAK(R) radiation hardened against natural space radiation * Total dose hardness: - > 100 krad (Si) - dependant upon space mission * Single Event Effects: - SEU Threshold is ~ 3.38 MeV/mg/cm2 - SEL Threshold = 37.1 - 59.9 MeV/mg/cm2 * Package: 68-pin RAD-PA(R) quad flat pack * Eight 80-bit numeric registers, usable as individual addressable general registers or as a register stack * Data types include: - 32-, 64-, 80-bit floating point - 32-, 64-bit integers - 18-digit BCD operands * 5 V Only power * Built-in exception handling * Upward object code compatible with All 80X87DX microprocessors * Full-range transcendental operations for SINE, COSINE, TANGENT, ARCTANGENT and LOGARITHM
DESCRIPTION:
Maxwell's 80387DX high speed microcircuit features a greater than 100 kilorad (Si) total dose tolerance. Using Maxwell's radiation hardened RAD-PAK(R) packaging technology, the 80387DX is a high-performance numerics processor that extends the 80386DX architecture with floating point, extended integer and BCD data types. The computing system fully conforms to the ANSI/IEEE floating-point standard. Using a numerics oriented architecture, the 80387DX adds over seventy mnemonics to the 80386DX instruction set, making the 80386DX/80387DX a complete solution for high-performance numerics processing. Maxwell Technologies' patented RAD-PAK packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S.
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Math Coprocessor
TABLE 1. PINOUT DESCRIPTION
PIN 1, 12, 19, 21, 35, 49, 53, 56 2, 13, 20, 32, 36, 39, 52, 68 SYMBOL VSS VCC Ground Positive Power Supply DESCRIPTION
80387DX
3-11, 18, 22-31, 33, 34, 37, D4-D12, D15, D16-25, D26, D27, Data Bus 38, 40, 41, 64-67 D28, D29, D30, D31, D0-D3 42 43 44 45 46 47 59 48 50 51 54 55 57 58 60 61 62 63 CKM 386CLK2 387CLK2 RESETIN NC Tie High READY CMD0 ADS NPS2 NPS1 W/R STEN READYO BUSY ERROR PEREQ Clock Mode 386 CPU Clock 2 387 MCP Clock 2 System Reset Not Connected Tie High Bus Ready Input Command Address Strobe MCP Select #2 MCP Select #1 Write/Read Status Enable Ready Output Busy Status Error Status Processor Extension Request
Memory
TABLE 2. ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage, any pin, with respect to Ground Power Dissipation Storage Temperature Range Operating Temperature Range Lead Temperature (soldering 10 seconds) SYMBOL VCC PD TS TA MIN -0.5 --65 -55 -MAX VCC+0.5 1.5 150 125 260 UNIT V W
C C C
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Math Coprocessor
TABLE 3. DELTA LIMITS
PARAMETER ILI ILO ICC CLK2 = 32 MHz ICC CLK2 = 50 MHz VARIATION 1.5 A 1.5 A 25 mA 39 mA
80387DX
TABLE 4. RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply Voltage Input Low Voltage Input High Voltage Operating Temperature SYMBOL VCC VIL VIH TA MIN 4.75 -0.3 2.0 -55 MAX 5.25 0.8 VCC +0.3 125 UNIT V V V C
Memory
TABLE 5. 80387DX DC ELECTRICAL CHARACTERISTICS
(VCC = 4.75V TO 5.25V; TA = -55 TO +125C, UNLESS OTHERWISE SPECIFIED) PARAMETER Input Low Voltage Input High Voltage 386 CLK2 Input Low Voltage 386 CLK2 Input High Voltage Output Low Voltage Output High Voltage SYMBOL VIL1 VIH1 VCL VCH VOL VOH IOL = 4 mA, D0-D31, IOL = 2.5 mA READYO , ERROR, BUSY, PEREQ IOH = -1 mA, D0-D31, IOH = -0.6 mA READYO, READYO, ERROR, BUSY, PEREQ 0V < VIN < VCC 0.45V < VOUT < VCC CLK2 = 32 MHz CLK2 = 40 MHz CLK2 = 50 MHz2 FC = 1 MHz FC = 1 MHz FC = 1 MHz -------TEST CONDITIONS MIN --2.0 -3.7 -2.4 MAX 0.8 --0.8 -0.45 -UNIT V V V V V V
Input Leakage Current Output Leakage Current Power Supply Current
ILI ILO ICC
15 15 250 310 390 10 12 20
A A mA
Input Capacitance3 Output CLK2 Capacitance3 Capacitance3
CIN CO CCLK
pF pF pF
1. This parameter is for all inputs, including 387CLK2 but excluding 386CLK2. 2. Icc is measured at steady state, maximum capacitive loading on the outputs, and worst-case DC level at the inputs; 386CLK2 at the same frequency as 387CLK2. 3. Guaranteed By Design
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Math Coprocessor
80387DX
TABLE 6. 80387DX COMBINATIONS OF BUS INTERFACE AND EXECUTION SPEEDS
(VCC = 4.75V TO 5.25V; TA = -55 TO +125C, UNLESS OTHERWISE SPECIFIED) PARAMETER Bus INterface Unit -16 -20 -25 Execution Unit -16 -20 -25 SYMBOL TEST CONDITIONS MIN 16 20 25 16 20 25 MAX ---MHz ---UNIT MHz
TABLE 7. 80387DX TIMING REQUIREMENTS OF THE EXECUTION UNIT
(VCC = 4.75V TO 5.25V; TA = -55 TO +125C, UNLESS OTHERWISE SPECIFIED) PARAMETER 387CLK2 Period1 -16 -20 -25 387CLK2 High Time -16 -20 -25 387CLK2 High Time1 -16 -20 -25 387CLK2 Low Time -16 -20 -25 387CLK2 Low Time1 -16 -20 -25 387CLK2 Fall Time1 -16 -20 -25 387CLK2 Rise Time1 -16 -20 -25 1. Guaranteed By Design SYMBOL t1 At 2V 31 25 20 t2a At 2V 9 8 7 t2b At 3.7V 5 5 4 t3a At 2V 9 8 7 t3b At 0.8V 7 6 5 t4 At 3.7V to 0.8V ---t5 At 0.8V to 3.7V ---8 8 7 8 8 7 ns ---ns ---ns ---ns ---ns 125 125 125 ns TEST CONDITION MIN MAX UNIT
Memory
ns
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(c)2002 Maxwell Technologies All rights reserved.
Math Coprocessor
(VCC = 4.75V TO 5.25V; TA = -55 TO +125C, UNLESS OTHERWISE SPECIFIED) PARAMETER 386CLK2 Period1 -16 -20 -25 386CLK2 High Time -16 -20 -25 386CLK2 High Time1 -16 -20 -25 386CLK2 Low Time -16 -20 -25 386CLK2 Low Time1 -16 -20 -25 386CLK2 Fall Time1 -16 -20 -25 386CLK2 Rise Time1 -16 -20 -25 386 CLK2/387CLK2 Ratio READYO Out Delay -16 -20 -25 PEREQ, ERROR Out Delay -16 -20 -25 BUSY Out Delay -16 -20 -25 CL = 50 pF At 2.0V CONDITIONS SYMBOL t1 31 25 20 At 2.0V t2a 9 8 7 At 3.7V t2b 5 5 4 At 2V t3a 9 8 7 At 0.8V t3b 7 6 5 At 3.7V to 0.8V t4 ---At 0.8V to 3.7V t5 ----t7 4 3 3 CL = 50 pF t7 5 5 4 CL = 50 pF t7 5 5 4 10/16 MIN
80387DX
MAX 125 125 125 ns ---ns ---ns ---ns ---ns 8 8 7 ns 8 8 7 14/10 34 31 24 ns 34 34 33 ns 34 29 29 -ns UNIT ns
TABLE 8. 80387DX TIMING REQUIREMENTS OF THE BUS INTERFACE UNIT (OUTPUT TRIP LEVEL = 1.5V)
Memory
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Math Coprocessor
(VCC = 4.75V TO 5.25V; TA = -55 TO +125C, UNLESS OTHERWISE SPECIFIED) PARAMETER D31 - D0 Out Delay -16 -20 -25 D31 - D0 Setup Time D31 - D0 Hold Delay D31 - D0 Float Time -16 -20 -25 PEREQ, BUSY, ERROR, READYO Float Time1 -16 -20 -25 ADS, W/R Setup Time -16 -20 -25 ADS, W/R Hold Time -16 -20 -25 READY SetupTime -16 -20 -25 READY Hold Time -16 -20 -25 CMDO SetupTime -16 -20 -25 CMDO HoldTime -16 -20 -25 NPS1, NPS2 Setup Time -16 -20 -25
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80387DX
CONDITIONS SYMBOL t8 1 1 0 t10 t11 11 11 6 6 5 33 27 24 ns 1 1 1 t14 26 21 16 t15 5 5 4 t16 21 12 9 t17 4 4 4 t16 21 19 16 t17 2 4 4 t16 21 19 16 ------ns ---ns ---ns ---ns ---ns ---ns 60 50 40 ns 54 54 50 ns ns ns MIN MAX UNIT ns
TABLE 8. 80387DX TIMING REQUIREMENTS OF THE BUS INTERFACE UNIT (OUTPUT TRIP LEVEL = 1.5V)
CL = 50 pF
CL = 50 pF2
t12
CL = 50 pF1
t13
Memory
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(c)2002 Maxwell Technologies All rights reserved.
Math Coprocessor
(VCC = 4.75V TO 5.25V; TA = -55 TO +125C, UNLESS OTHERWISE SPECIFIED) PARAMETER NPS1, NPS2 Hold Time -16 -20 -25 STEN Setup Time -16 -20 -25 STEN Hold Time -16 -20 -25 RESETIN Setup Time -16 -20 -25 RESETIN Hold Time -16 -20 -25 1. Guaranteed By Design CONDITIONS SYMBOL t17 2 2 4 t16 21 21 15 t17 2 2 4 t18 13 12 10 t19 4 4 3 MIN
80387DX
MAX ---ns ---ns ---ns ---ns ---UNIT ns
TABLE 8. 80387DX TIMING REQUIREMENTS OF THE BUS INTERFACE UNIT (OUTPUT TRIP LEVEL = 1.5V)
Memory
2. Float condition occurs when maximum output current becomes less than ILO in magnitude. Float Delay is not tested.
TABLE 9. 80387DX TIMING REQUIREMENT OF OTHER PARAMETER
PARAMETER RESETIN Duration RESETIN Inactive to First Opcode Write BUSY Duration ERROR Inactive to BUSY Inactive PEREQ Inactive to ERROR Active READY Active to Busy Active READY Minimum Time from Opcode Write to Opcode to Opcode/ Operand Write READY Minimum Time from Operand Write to Operand Write SYMBOL t30 t31 t32 t33 t34 t35 t36 t37 MIN 40 50 6 6 6 4 6 8 4 MAX UNIT (387 CLK2) (387 CLK2) (386 CLK2) (386 CLK2) (386 CLK2) (386 CLK2) (386 CLK2) (386 CLK2)
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Math Coprocessor
80387DX
FIGURE 1. TIMING DIAGRAMS - FAST TRANSITIONS TO AND FROM PIPELINED CYCLES
Memory
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Math Coprocessor
80387DX
FIGURE 2. TIMING DIAGRAM - NON-PIPELINED READ AND WRITE CYCLES
Memory
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Math Coprocessor
FIGURE 3. TIMING DIAGRAM - PIPLINED CYCLES WITH WAIT STATES
80387DX
Memory
FIGURE 4. TIMING DIAGRAM - STEN, BUSY, AND PEREQ TIMING RELATIONSHIP
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Math Coprocessor
80387DX
FIGURE 5. TIMING DIAGRAM - 386CLK2/387CLK2 WAVEFORM AND MEASUREMENT POINTS FOR INPUT/ OUTPUT AC SPECIFICATIONS
Memory
FIGURE 6. TIMING DIAGRAM - TEST CIRCUIT
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Math Coprocessor
FIGURE 7. TIMING DIAGRAM - RESET
80387DX
FIGURE 8. TIMING DIAGRAM - OUTPUT
Memory
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Math Coprocessor
FIGURE 9. TIMING DIAGRAM - INPUT AND I/O SIGNALS
80387DX
Memory
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Math Coprocessor
FIGURE 10. TIMING DIAGRAM - FLOAT FROM STEN
80387DX
FIGURE 11. TIMING DIAGRAM - OTHER PARAMETERS
Memory
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Math Coprocessor
80387DX
Memory
14 PIN RAD-PAK(R) FLAT PACKAGE
SYMBOL MIN A b c D D1 e S1 F1 F2 L A1 N 0.013 0.645 0.645 0.477 0.080 0.121 0.016 0.008 0.940 DIMENSION NOM 0.135 0.018 0.010 0.950 0.800 BSC 0.050 BSC 0.066 0.650 0.650 0.487 0.090 68 -0.655 0.655 0.497 0.100 MAX 0.145 0.020 0.012 0.960
Note: All dimensions in inches. Q68-01
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Math Coprocessor
Important Notice:
80387DX
These data sheets are created using the chip manufacturer's published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies' products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies' liability shall be limited to replacement of defective parts.
Memory
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Math Coprocessor
Product Ordering Options
Model Number 80387DX RP Q X Feature
80387DX
Option Details
Screening Flow
Monolithic S = Maxwell Class S B = Maxwell Class B E = Engineering (testing @ +25C) I = Industrial (testing @ -55C, +25C, +125C)
Memory
Package
Q = Quad Flat Pack
Radiation Feature
RP = RAD-PAK(R) package
Base Product Nomenclature
Math Coprocessor
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